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US Patent 6240489 - Method for implementing a pseudo least recent used (LRU) mechanism in a four-way cache memory within a data processing system

US Patent Issued on May 29, 2001
Estimated Patent Expiration Date: Icon_subject February 24, 2019Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

A method for implementing a pseudo least recent used mechanism in a four-way cache memory within a data processing system is disclosed. Within a four-way set associative cache memory, each congruence class contains four cache lines. Each congruence class within the cache memory is associated to a least recently used (LRU) field that has four bits. Each of four cache lines within the congruence class is then assigned with a respective set number. The set number of a cache line designated as a least recently used set among the four cache lines is stored in two bits of the LRU field. The set number of a cache line designated as a most recently used set among the four cache lines is stored in another two bits of the LRU field. In response to a determination that the set number of the least recently used set is higher than the set number of the most recently used set, one of the remaining two cache lines that has a higher set number is assigned to be a second least recently used set.

Inventors

Application

No. 256373 filed on 02/24/1999

US Classes:

711/136, Least recently used711/129, Partitioned cache711/133, Entry replacement strategy711/144Cache status data bit

Field of Search

711/136, Least recently used711/144, Cache status data bit711/129, Partitioned cache711/133, Entry replacement strategy711/134, Combined replacement modes711/158, Prioritizing711/159, Entry replacement strategy711/160, Least recently used (LRU)711/151Prioritized access regulation

Examiners

Primary: Yoo, Do Hyun
Assistant: Namazi, Mehdi

Attorney, Agent or Firm

US Patent References

5765191, Method for implementing a four-way least recently used (LRU) mechanism in high-performance
Issued on: 06/09/1998
Inventor: Loper, et al.
5875464Computer system with private and shared partitions in cache
Issued on: 02/23/1999
Inventor: Kirk

International Class

G06F 012/00

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