Method of increasing the mobility of MOS transistors by use of localized stress regions
Patent 6228694 Issued on May 8, 2001. Estimated Expiration Date: 
June 28, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
June 28, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod of manufacturing CMOS semiconductor device having decreased diffusion layer capacitance Semiconductor device with self-aligned insulator Patent #: 5955767 InventorsApplicationNo. 340583 filed on 06/28/1999US Classes:438/199, Complementary insulated gate field effect transistors (i.e., CMOS)257/E21.618, With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (EPO)257/E21.619, With particular manufacturing method of source or drain, e.g., specific S or D implants or silicided S or D structures or raised S or D structures (EPO)257/E29.02, Isolation by dielectric regions (EPO)257/E29.021, For source or drain region of field-effect device (EPO)257/E29.107, Imperfections within semiconductor body (EPO)438/217, Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.)438/229, Self-aligned438/275, Making plural insulated gate field effect transistors of differing electrical characteristics438/276, Introducing a dopant into the channel region of selected transistors438/289Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.)ExaminersPrimary: Pham, LongAttorney, Agent or FirmInternational ClassH01L 021/823.8AbstractA method of modifying the mobility of a transistor. First, a substance is implanted into a substrate. The substrate is then annealed such that the implanted substance forms at least one void in the substrate. Then, a transistor is formed on the substrate.Other References
Field of SearchComplementary insulated gate field effect transistors (i.e., CMOS)Doping of semiconductor channel region beneath gate insulator (e.g., threshold voltage adjustment, etc.) Self-aligned Making plural insulated gate field effect transistors of differing electrical characteristics Introducing a dopant into the channel region of selected transistors Doping of semiconductive channel region beneath gate insulator (e.g., adjusting threshold voltage, etc.) Into grooved or recessed semiconductor region | |
