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US Patent 6224690 - Flip-Chip interconnections using lead-free solders

US Patent Issued on May 1, 2001
Estimated Patent Expiration Date: Icon_subject March 12, 2016Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

An interconnection structure suitable for the connection of microelectronic circuit chips to packages is provided by this invention. In particular, the invention pertains to the area-array or flip-chip technology often called C4 (controlled collapse chip connection). The structure comprises an adhesion/barrier layer deposited on a passivated substrate (e.g., a silicon wafer), optionally an additional adhesion layer, a solderable layer of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo, CoFe and NiCoFe on the adhesion/barrier layer, and a lead-free solder ball comprising tin as the predominate component and one or more alloying elements selected from Bi, Ag, and Sb, and further optionally including one or more elements selected from the group consisting of Zn, In, Ni, Co and Cu.

Other References

  • Raman, K.S et al, "Spreading Characteristics of Some Solders on Stainless Steel," Metals Miner. Rev. (1971), 10(8), 7-11 (abstract only

Inventors

Application

No. 614984 filed on 03/12/1996

US Classes:

148/400, STOCK257/738, Ball shaped257/751, At least one layer forms a diffusion barrier257/753, With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer257/766, At least one layer containing chromium or nickel257/E23.021Bump or ball contacts (EPO)

Field of Search

420/459, Iron or manganese containing420/562, Antimony, or bismuth containing420/557, TIN BASE257/738, Ball shaped257/751, At least one layer forms a diffusion barrier257/753, With adhesion promoting means (e.g., layer of material) to promote adhesion of contact to an insulating layer257/766, At least one layer containing chromium or nickel257/772, Solder composition257/778, Flip chip257/781, Layered contact, lead or bond428/620, Semiconductor component428/667, Next to Co-, Fe-, or Ni-base component148/400STOCK

Examiners

Primary: Ip, Sikyin

Attorney, Agent or Firm

US Patent References

4806309, Tin base lead-free solder composition containing bismuth, silver and antimony
Issued on: 02/21/1989
Inventor: Tulman
5376584, Process of making pad structure for solder ball limiting metallurgy having reduced edge stress
Issued on: 12/27/1994
Inventor: Agarwala
5393489, High temperature, lead-free, tin based solder composition
Issued on: 02/28/1995
Inventor: Gonya, et al.
5634268Method for making direct chip attach circuit card
Issued on: 06/03/1997
Inventor: Dalal, et al.

Foreign Patent References

  • 6-344180 JP. 12/16/1994
  • 7-51883 JP. 02/16/1995
  • 9534401 WO. 12/16/1995

International Class

C22C 007/00

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