Scheme for carrying out modular calculations based on redundant binary calculation
Patent 6175850 Issued on January 16, 2001. Estimated Expiration Date: 
February 2, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
February 2, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesProcessor for executing arithmetic operations on input data and constant data with a small error Process and device for the decoding of a shortened, cyclic binary code using error correction Iterative division apparatus, system and method employing left most one's detection and left most one's detection with exclusive or Patent #: 5644524 InventorsAssigneeApplicationNo. 017520 filed on 02/02/1998US Classes:708/491, Residue number708/650DivisionExaminersPrimary: Ngo, Hung V.Attorney, Agent or FirmForeign Patent References
International ClassG06F 007/38Foreign Application Priority Data1997-02-03 JPAbstractA scheme for carrying out modular calculations which is capable of carrying out modular calculations using redundant binary calculation even when a number of bits of the mantissa (dividend) is larger than a number of bits of the modulus (divisor). In this scheme, the divisor c in the divisor register is left shifted by (i-j) digits when a number of digits j of the divisor c is less than a number of digits i that can be stored in the divisor register, and the modular reduction a mod c is calculated up to (i-j)-th decimal place using the dividend a and the left shifted divisor c. Alternatively, the divisor c given in h-ary notation in the divisor register is left shifted by (i-j) digits when a number of digits j of the divisor c is less than a number of digits i that can be stored in the divisor register, while the dividend a given in h-ary notation in the dividend register is left shifted by (k-l) digits when a number of digits l of the dividend a is less than a number of digits k that can be stored in the dividend register, where kࣙi. Then, the modular reduction a mod c is calculated up to a digit of [(k-l)-(i-j)]-th power of h using the left shifted dividend a and the left shifted divisor c to obtain a remainder, and this remainder is right shifted by (k-l) digits.Other References
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