U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

System and method for testing interrupt processing logic within an instruction processor

Patent 6167479 Issued on December 26, 2000. Estimated Expiration Date: Icon_subject August 3, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Circuit and method for emulating the functionality of an advanced programmable interrupt controller
Patent #: 5727217
Issued on: 03/10/1998
Inventor: Young

Emulation of interrupt control mechanism in a multiprocessor system
Patent #: 5889978
Issued on: 03/30/1999
Inventor: Jayakumar

Method and system for handling interrupts during emulation of a program
Patent #: 5949985
Issued on: 09/07/1999
Inventor: Dahl, et al.

Method and system for interrupt handling during emulation in a data processing system Patent #: 5995743
Issued on: 11/30/1999
Inventor: Kahle, et al.

Inventors

Application

No. 128297 filed on 08/03/1998

US Classes:

710/260INTERRUPT PROCESSING

Examiners

Primary: Auve, Glenn A.

Attorney, Agent or Firm

International Class

G06F 009/48

Abstract

A system and method is provided for selectively injecting interrupts within the instruction stream of a data processing system. The system includes a programmable storage device for storing interrupt injection signals, each of which is associated with a respective machine instruction. When execution of the associated machine instruction is initiated, the stored signal is read from the storage device and is made available to the interrupt logic within the instruction processor. If set to a predetermined logic level, the signal causes an interrupt to be injected within the instruction processor. The system provides the capability to simultaneously inject different types of interrupts, including fault and non-fault interrupts, during the execution of any instruction. The invention further provides a programmable means for injecting errors at predetermined intervals in the instruction stream. Because the current invention allows interrupt injection to be controlled by programmable logic within the instruction processor itself instead by stimulus generated and controlled by a simulation program as in prior art systems, there is no need to develop complex simulation programs to generate and control the external stimulus. Any simulation program can utilize the interrupt injection system to test the interrupt logic. Furthermore, the injected interrupts are handled in a manner which is transparent to the system software, which makes development of test-version interrupt handling code unnecessary. Moreover, the interrupt injection system may be used during normal (non-test) situations to place the instruction processor under microcode control. This can be useful to provide temporary fixes to hardware problems in a manner which is transparent to the operating system.

PatentsPlus Images
Enhanced PDF formats
loading...
PatentsPlus: add to cart
PatentsPlus: add to cartSearch-enhanced full patent PDF image
$9.95more info
PatentsPlus: add to cart
PatentsPlus: add to cartIntelligent turbocharged patent PDFs with marked up images
$16.95more info
 
Sign InRegister
Username  
Password   
forgot password?