U.S. patents available from 1976 to present.
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Method and apparatus for code synchronization in a global positioning system receiver

Patent 6163567 Issued on December 19, 2000. Estimated Expiration Date: Icon_subject December 22, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

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Patent #: 4649549
Issued on: 03/10/1987
Inventor: Halpern ,   et al.

P-code-aided global positioning system receiver
Patent #: 4972431
Issued on: 11/20/1990
Inventor: Keegan

Multi-channel digital receiver for global positioning system
Patent #: 5101416
Issued on: 03/31/1992
Inventor: Fenton, et al.

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Patent #: 5414729
Issued on: 05/09/1995
Inventor: Fenton

Carrier tracking loop for QPSK demodulator
Patent #: 5579345
Issued on: 11/26/1996
Inventor: Kroeger, et al.

Dynamic channel allocation for GPS receivers
Patent #: 5600670
Issued on: 02/04/1997
Inventor: Turney

Non-coherent digital receiver of a spread spectrum communication system
Patent #: 5729571
Issued on: 03/17/1998
Inventor: Park, et al.

Mitigation of multipath effects in global positioning system receivers Patent #: 5963582
Issued on: 10/05/1999
Inventor: Stansell, Jr.

Inventor

Assignee

Application

No. 219541 filed on 12/22/1998

US Classes:

375/149, Having specific code synchronization375/150Correlation-type receiver

Examiners

Primary: Bocure, Tesfaldet

Attorney, Agent or Firm

International Class

H04K 001/00

Abstract

An improved method and apparatus for effecting code synchronization in a global positioning system receiver is disclosed herein. Within the receiver, digital in-phase (I) and quadrature (Q) samples of a plurality of received pseudorandom noise (PRN) encoded signals are provided to a code synchronization circuit. The code synchronization circuit is designed for coherent-mode operation when the receiver has achieved phase-lock with one of the PRN encoded signals, and operates in a non-coherent mode otherwise.The code synchronization circuit includes an I-channel correlator for producing a coherent-mode discrimination signal by correlating in-phase (I) samples of a first of said PRN encoded signals with a discrimination pattern, wherein the first PRN encoded signal is encoded with a first PRN code. The discrimination pattern is comprised of two or more PRN code modulation components, the phases of which are adjusted based on the value of a code phase control signal obtained by averaging or otherwise processing the coherent-mode discrimination signal.During non-coherent mode operation, both the in-phase (I) and quadrature (Q) samples of one of the PRN-encoded signals are correlated with a discrimination pattern and with a locally-generated replica of the PRN code. The results of the two I-channel correlations are then multiplied, as are the results of the Q-channel correlations. The resultant product signals generated during the multiplications are then combined into a non-coherent mode discrimination signal.

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