Method for manufacturing a package structure having a heat spreader for integrated circuit chips
Patent 6162659 Issued on December 19, 2000. Estimated Expiration Date: 
March 5, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
March 5, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod of making a multi-chip module having an improved heat dissipation efficiency Ceramic ball grid array (CBGA) package structure having a heat spreader for integrated-circuit chips Patent #: 5777385 InventorApplicationNo. 263033 filed on 03/05/1999US Classes:438/106, PACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTOR257/E23.069, Spherical bumps on substrate for external connection, e.g., ball grid arrays (BGA) (EPO)257/E23.09, Auxiliary members in containers characterized by their shape, e.g., pistons (EPO)257/E23.101, Selection of materials, or shaping, to facilitate cooling or heating, e.g., heat sinks (EPO)438/122Possessing thermal dissipation structure (i.e., heat sink)ExaminersPrimary: Nelms, David C.Assistant: Le, Dinh T. Attorney, Agent or FirmInternational ClassH10L 021/44AbstractA method for manufacturing package structure integrated circuit chips having a heat spreader is disclosed. A wiring substrate is first provided. An integrated circuit chip, having a first surface and a second surface, is then electrically and mechanically connected to the wiring substrate via a first set of solder joints. A heat spreader is subsequently connected to the second surface of the integrated circuit chip via a second set of solder joints. The heat spreader includes an adhesion-promotion layer on a silicon layer.Field of SearchPACKAGING (E.G., WITH MOUNTING, ENCAPSULATING, ETC.) OR TREATMENT OF PACKAGED SEMICONDUCTORAssembly of plural semiconductive substrates each possessing electrical device Forming solder contact or bonding pad Bump electrode Plural conductive layers Possessing thermal dissipation structure (i.e., heat sink) With heat sink Directly attached to semiconductor device With provision for cooling the housing or its contents Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer) | |
