Patent ReferencesInventorsAssigneeApplicationNo. 09/092465 filed on 06/05/1998US Classes:327/91, Including details of sampling or holding327/337, Having switched capacitance327/77Input signal compared to single fixed referenceExaminersPrimary: Tran, ToanAttorney, Agent or FirmInternational ClassesG11C 27/02 (20060101)G11C 27/00 (20060101) G11C 027/02 () Foreign Application Priority Data1997-06-06 JP 9-149631AbstractCharge transfer amplifier circuit which is capable of canceling fluctuations in the element characteristics thereof and which conducts highly accurate voltage amplification without the use of a stationary current, and provides a voltage comparator which may be applied to a highly accurate A/D converter which has low power consumption. The charge transfer amplifier circuit is provided with a MOS transistor, a first capacity and a second capacity which are effectively connected to, respectively, the source electrode and the drain electrode of the MOS transistor, a mechanism for setting the region between the terminals of the first capacity and the region between the terminals of the second capacity, respectively, to appropriate predetermined potential differences, and for releasing these, and a mechanism for appropriately externally altering the potential difference between the gate and the source of the MOS transistor. The first capacity is set so as to be larger than the second capacity. Furthermore, in the voltage comparator, a dynamic latch circuit is connected to the drain electrode of the charge transfer amplifier circuit.Field of SearchIncluding details of sampling or holdingSample and hold Having feedback With differential amplifier Input signal compared to single fixed reference Having switched capacitance WITH PERIODIC SWITCHING INPUT-OUTPUT (E.G., FOR DRIFT CORRECTION) COMBINED WITH AUTOMATIC AMPLIFIER DISABLING SWITCH MEANS | |