Silicon nitride deposition method for use in forming a memory cell dielectric
October 22, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3652342 Method of manufacturing a semiconductor device Native oxide reduction for sealing nitride deposition Multilayer semi-insulating film for hermetic wafer passivation and method for making same Passivation for integrated circuit structures Process for fabricating capacitors in dynamic RAM Controlled recrystallization of buried strap in a semiconductor memory device Method of forming an ultra thin dielectric film for a capacitor Increased interior volume for integrated memory cell Patent #: 5760434 InventorsApplicationNo. 956142 filed on 10/22/1997US Classes:438/791, Silicon nitride formation257/E21.268, Of silicon (EPO)257/E21.546, Using trench refilling with dielectric materials (EPO)438/680, Utilizing chemical vapor deposition (i.e., CVD)438/775, Nitridation438/792Utilizing electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.)ExaminersPrimary: Nelms, David C.Assistant: Berry, Renee R. Attorney, Agent or FirmForeign Patent References
International ClassH01L 021/31AbstractA method for use in forming a memory cell dielectric includes providing a substrate surface of a memory cell including a silicon based electrode surface. Silicon is predeposited on the electrode surface followed by the deposition of a silicon nitride layer. An incubation time for the start of silicon nitride nucleation at the electrode surface is decreased relative to the incubation time for the start of silicon nitride nucleation when silicon nitride is deposited without predeposition of silicon on the electrode surface. Further, the substrate surface may include one or more component surfaces and when at least a monolayer of silicon is predeposited thereon silicon nitride nucleation at the substrate surface is performed at a substantially equivalent rate independent of the different component surfaces. Alternatively to the predeposition of silicon, the electrode surface may be nitridated prior to deposition of the silicon nitride layer to promote nucleation thereof at an interface between the electrode surface and the silicon nitride layer.Other References
Field of SearchStacked capacitorIncluding selectively removing material to undercut and expose storage node layer Source or drain doping Forming active region from adjacent doped polycrystalline or amorphous semiconductor Stacked capacitor Having sidewall structure Lateral etching of intermediate layer (i.e., undercutting) Silicon oxide formation Utilizing chemical vapor deposition (i.e., CVD) RADIATION OR ENERGY TREATMENT MODIFYING PROPERTIES OF SEMICONDUCTOR REGION OF SUBSTRATE (E.G., THERMAL, CORPUSCULAR, ELECTROMAGNETIC, ETC.) Utilizing electromagnetic or wave energy (e.g., photo-induced deposition, plasma, etc.) Silicon nitride formation | |
