U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Serial bus system for shadowing registers

Patent 6108729 Issued on August 22, 2000. Estimated Expiration Date: Icon_subject May 5, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Input/output data port with a parallel and serial interface
Patent #: 5596724
Issued on: 01/21/1997
Inventor: Mullins, et al.

Add-in board with enable-disable expansion ROM for PCI bus computers
Patent #: 5608876
Issued on: 03/04/1997
Inventor: Cohen, et al.

System management shadow port
Patent #: 5630147
Issued on: 05/13/1997
Inventor: Datta, et al.

Bridge between two buses of a computer system with a direct memory access controller with accessible registers to support power management
Patent #: 5642489
Issued on: 06/24/1997
Inventor: Bland, et al.

Method and apparatus for packing digital data
Patent #: 5649127
Issued on: 07/15/1997
Inventor: Hang

Method and structure for data transfer between a standard port of a host computer and a custom port of a palmtop computer using a docking station Patent #: 5666495
Issued on: 09/09/1997
Inventor: Yeh

Inventors

Assignee

Application

No. 073135 filed on 05/05/1998

US Classes:

710/304Hot docking

Examiners

Primary: Sheikh, Ayaz R.
Assistant: Wiley, David

Attorney, Agent or Firm

International Class

G06F 013/00

Abstract

The present invention relates to a low latency serial bus system for shadowing registers between first and second digital devices. Either the first device or the second device may initiate a data transfer cycle on the serial bus when data in a shadowed register of that device has changed. The data transfer cycle includes a first frame where data is transferred from the first device to the second device and a second frame where data is transferred from the second device to the first device. The devices do not initiate a subsequent data transfer cycle for changed data if the changed data can be transferred in the current data transfer cycle.

Other References

  • I2 C-bus and how to use it, Phillips Semiconductors, 1992
  • Serialized IRO Support for PCI Systems, Sep. 1, 1995, Rev. 6.0
  • Intel.RTM. System Management Bus Specification, Rev. 1.0, Feb. 15, p. 1-17, 1995
  • Universal Serial Bus Specification, Rev. 0.9, pp. 14-22, pp. 63-80, Apr. 199
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