U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Method and apparatus for selective removal of material from wafer alignment marks

Patent 6103636 Issued on August 15, 2000. Estimated Expiration Date: Icon_subject August 20, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Process for etching tin oxide
Patent #: 4750980
Issued on: 06/14/1988
Inventor: Hynecek

Process for etching a semiconductor device using an improved protective etching mask
Patent #: 5223083
Issued on: 06/29/1993
Inventor: Cathey, et al.

Method for selective removal of a material from a wafer's alignment marks
Patent #: 5271798
Issued on: 12/21/1993
Inventor: Sandhu, et al.

Submicron particle removal using liquid nitrogen
Patent #: 5555902
Issued on: 09/17/1996
Inventor: Menon

Wafer alignment sensor
Patent #: 5576831
Issued on: 11/19/1996
Inventor: Nikoonahad, et al.

Wafer pattern defect detection method and apparatus therefor
Patent #: 5576833
Issued on: 11/19/1996
Inventor: Miyoshi, et al.

Method for making interconnects and semiconductor structures using electrophoretic photoresist deposition
Patent #: 5607818
Issued on: 03/04/1997
Inventor: Akram, et al.

Registration accuracy measurement mark for semiconductor devices Patent #: 5646452
Issued on: 07/08/1997
Inventor: Narimatsu

Inventors

Application

No. 916997 filed on 08/20/1997

US Classes:

438/745, Liquid phase etching257/E21.304, By chemical mechanical polishing (CMP) (EPO)257/E21.309, By liquid etching only (EPO)438/749, Sequential application of etchant438/750, To same side of substrate438/753Silicon

Examiners

Primary: Utech, Benjamin L.
Assistant: Vinh, Lan

Attorney, Agent or Firm

International Class

H01L 021/306

Abstract

A process and apparatus for locally removing any material, such as a refractory metal, in particular tungsten, from any desired area of a wafer, such as an alignment mark area of a silicon wafer in process during the formation of integrated circuits thereon. The process comprising the steps of aligning said area of said wafer, such as an alignment mark on the wafer, to an etchant dispensing apparatus, placing the surface of the wafer adjacent at least a portion of an annular portion of the etchant dispensing apparatus, dispensing at least one etchant onto said area of said wafer, such as an alignment mark, and removing the at least one etching from the wafer. The apparatus for the cleaning of an area of a semiconductor wafer using a material comprising a tube having a bore therethrough and exterior wall, the tube supplying material to said area of the wafer and an annular member having an interior wall surrounding the tube, the annular member having a thin edge thereon for positioning adjacent a portion of the area of the wafer during the cleaning thereof, the annular member forming an annular space between the exterior wall of the tube and the interior wall of the annular member.

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