U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Matrix addressable array for digital xerography

Patent 6100909 Issued on August 8, 2000. Estimated Expiration Date: Icon_subject March 2, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Method for two-color development of a xerographic charge pattern
Patent #: 4078929
Issued on: 03/14/1978
Inventor: Gundlach

Image forming method and device for same
Patent #: 4448867
Issued on: 05/15/1984
Inventor: Ohkubo ,   et al.

Electrographic writing head
Patent #: 4588997
Issued on: 05/13/1986
Inventor: Tuan ,   et al.

Electrostatic image forming apparatus using field effect transistors
Patent #: 4620203
Issued on: 10/28/1986
Inventor: Nakatani ,   et al.

Image-forming element for an electrostatic printer having electrodes in the form of a grid
Patent #: 4748464
Issued on: 05/31/1988
Inventor: Pannekoek ,   et al.

Electrostatic image output apparatus
Patent #: 4757343
Issued on: 07/12/1988
Inventor: Nakatani ,   et al.

High voltage thin film transistor
Patent #: 4998146
Issued on: 03/05/1991
Inventor: Hack

Image forming apparatus using an electrode matrix to form a latent image Patent #: 5640189
Issued on: 06/17/1997
Inventor: Ohno, et al.

Inventors

Assignee

Application

No. 032923 filed on 03/02/1998

US Classes:

347/141, Specific electrostatic head347/112Electrostatic

Examiners

Primary: Brase, Sandra L.

Attorney, Agent or Firm

International Classes

B41J 002/39
B41J 002/395

Abstract

An apparatus for forming an image comprising a substrate with a plurality of high voltage transistors on the substrate. The transistors include a source electrode, a drain electrode and a gate electrode. Each transistor switches a marking potential of several hundred volts between the source and drain by a gate potential of at least an order of magnitude lower than the source to drain potential. There are a plurality of high voltage capacitors on the substrate. One of each capacitor is connected to one of the drain electrodes and each capacitor stores a charge potential approximately equal to the marking potential. The charge potential on each capacitor controls the forming of the image. A first data input on the substrate selectively loads a gate potential on gate the electrodes. A second data input located on the periphery of the substrate selectively loads a source potential on the source electrodes. The high voltage capacitors, the high voltage transistors, and the first data input are thin film elements integrally formed on the substrate.

Other References

  • W.E. Haas, D.G. Parker and H.M. Stark, Highlight Color Printing: The Start of a New Machine, vol. 36, No. 4, Jul./Aug. 1992, pp. 366-372
  • Russel A. Martin, Victor M. Da Costa, Michael Hack and John G. Shaw, High-Voltage Amorphous Silicon Thin-Film Transistors, IEEE Transactions on Electron Devices, vol. 40, No. 3, Mar. 1993, pp. 634-644
  • Patrick A. O'Connell, Richard Gable and Clifford Brown, Amorphous Silicon Technology--Bringing a New Level of Integration and Image Quality to Electrostatic Printing, pp. 1-
PatentsPlus Images
Enhanced PDF formats
loading...
PatentsPlus: add to cart
PatentsPlus: add to cartSearch-enhanced full patent PDF image
$9.95more info
PatentsPlus: add to cart
PatentsPlus: add to cartIntelligent turbocharged patent PDFs with marked up images
$16.95more info
 
Sign InRegister
Username  
Password   
forgot password?