Patent ReferencesIntegrated fault-tolerant air data inertial reference system Method and apparatus for a fault tolerant clock with dynamic reconfiguration Fault-tolerant computer architecture Fault tolerant computer system Patent #: 5903717 InventorsAssigneeApplicationNo. 034282 filed on 03/04/1998US Classes:714/797, Majority decision/voter circuit714/820Plural parallel devices of channelsExaminersPrimary: Nguyen, Hiep T.Attorney, Agent or FirmInternational ClassesG06F 011/08G06F 007/02 AbstractAn single event upset (SEU) tolerant system for detecting and correcting an SEU includes a decision element (200) for receiving a plurality of outputs (120) from a plurality of signal generators (105) and producing an output (130) therefrom. The decision element includes voters which provide two levels of voting for the plurality of redundant outputs (120). First-level voters (300) provide intermediate voted outputs (315) which are received by a second-level voter to determine an output (130). An output disabler (400) determines when an output is provided external to the decision element. A plurality of comparators (210) receive intermediate voted outputs (315) from first-level voters and compare with a plurality of outputs from a plurality of signal generators to determine upset detected signals (125). An upset detected signal controls the selection of feedback for an element having experienced an SEU.Field of SearchMajority decision/voter circuitRedundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data) Reconfiguration (e.g., adding a replacement storage component) Isolating failed storage location (e.g., sector remapping) Fault locating (i.e., diagnosis or testing) Performance monitoring for fault avoidance Error detection or notification Comparison of data Plural parallel devices of channels | |