Method of maximizing chip yield for semiconductor wafers
September 25, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3751647 3842491 Shot arranging method in a divisional printing apparatus Boat fender Method of integrated circuit chips design Fault-tolerant waferscale integrated circuit device and method Method for manufacturing test simulation in electronic circuit design Wafer surface protection in a gas deposition process Method for performing chemical mechanical polish (CMP) of a wafer Apparatus for supporting a substrate and introducing gas flow doximate to an edge of the substrate InventorAssigneeApplicationNo. 937764 filed on 09/25/1997US Classes:716/10, Constraint-based placement (e.g., critical block assignment, delay limits, wiring capacitance)257/E21.525, Procedures, i.e., sequence of activities consisting of plurality of measurement and correction, marking or sorting steps (EPO)382/149, Fault or defect detection700/110, Defect analysis or recognition700/121, Integrated circuit production or semiconductor fabrication702/84, Quality control702/181Probability determinationExaminersPrimary: Teska, Kevin J.Assistant: Kik, Phallaka Attorney, Agent or FirmForeign Patent References
International ClassesG06F 017/50G06F 019/00 G06K 009/03 AbstractA method of fabricating semiconductor chips includes the steps of optimizing a number of chips that geometrically fit on a wafer and maximizing chip yield for the wafer by considering chips located in a normally rejectable location and utilizing yield probability data for the chip in the normally rejectable locations to weight the probability of an acceptable chip such that if the probability is above a threshold value the chips are not rejected. This results in an increased chip yield for semiconductor wafers.Other References
Field of SearchFault or defect detectionInspection of semiconductor device or printed circuit board And removal of defect Quality control Timekeeping (e.g., clock, calendar, stopwatch) Statistical measurement Histogram distribution Probability determination Performance or efficiency evaluation Diagnostic analysis Maintenance Cause or fault identification | |
