Insulator and metallization method for VLSI devices with anisotropically-etched contact holes
Metallization process for integrated circuits
Semiconductor device having a funnel shaped inter-level connection
Semiconductor device having multilayer interconnection structure
Contact sidewall tapering with argon sputtering
Two-step chemical mechanical polishing process for producing flush and protruding tungsten plugs
Method for forming barrier metal structure
Tapering sidewalls of via holes
Method of making a small geometry contact using sidewall spacers
Method of forming a contact
ApplicationNo. 985088 filed on 12/04/1997
US Classes:438/672, Plug formation (i.e., in viahole)257/E23.019, Consisting of layered constructions comprising conductive layers and insulating layers, e.g., planar contacts (EPO)257/E23.152, Cross-sectional geometry (EPO)257/E23.168, Including internal interconnections, e.g., cross-under constructions (EPO)438/618, Contacting multiple semiconductive regions (i.e., interconnects)438/629, Diverse conductive layers limited to viahole/plug438/631, Having planarization step438/640, Having viahole of tapered shape438/666, Specified configuration of electrode or contact438/668, Specified aspect ratio of conductor or viahole438/673Tapered etching
ExaminersPrimary: Niebling, John F.
Assistant: Gurley, Lynne A.
Attorney, Agent or Firm
International ClassH01L 021/44
AbstractA method of forming a connection is comprised of the steps of depositing a lower conductor. A dielectric layer is deposited on the lower conductor, with the dielectric layer having a lower surface adjacent to the lower conductor, and having an upper surface. An opening extending between the upper surface and the lower surface of the dielectric layer is formed. A conductive plug is deposited within the opening, with the plug having an upper surface proximate the upper surface of the dielectric layer. The upper surface has an edge where the upper surface of the plug is adjacent to the dielectric layer. A recess is formed proximate to the edge of the upper surface of the plug, the recess extending into both the plug and the dielectric layer. Finally, an upper conductor is deposited on the upper surface of the dielectric layer and the upper surface of the plug. A connection thus formed is also disclosed.
Field of SearchPlug formation (i.e., in viahole)
Contacting multiple semiconductive regions (i.e., interconnects)
Diverse conductive layers limited to viahole/plug
Having planarization step
Having viahole of tapered shape
Specified configuration of electrode or contact
Specified aspect ratio of conductor or viahole