Patent ReferencesIntegrated magnetostrictive-piezoelectric-metal oxide semiconductor magnetic playback head Thin film semiconductor system Ultra-low phase noise GE MOSFETs Semiconductor device having first and second insulating layers Field effect transistor with nitride compound Method for fabricating MIS device having GATE insulator of GaS or gallium sulfide MOSFET device with unsymmetrical LDD region Patent #: 5952700 InventorsAssigneeApplicationNo. 356470 filed on 07/19/1999US Classes:257/410, Gate insulator includes material (including air or vacuum) other than SiO 2257/406, Plural gate insulator layers257/411, Composite or layered gate insulator (e.g., mixture such as silicon oxynitride)257/E21.193, On single crystalline silicon (EPO)257/E29.162, Insulating materials for IGFET (EPO)257/E29.165Multiple layers (EPO)ExaminersPrimary: Clark, Sheila V.Assistant: Tran, H. D. Attorney, Agent or FirmInternational ClassH01L 029/76AbstractA high-k dielectric film is provided which remains amorphous at relatively high annealing temperatures. The high-k dielectric film is a metal oxide of either Zr or Hf, doped with a trivalent metal, such as Al. Because the film resists the formation of a crystalline structure, interfaces to adjacent films have fewer irregularities. When used as a gate dielectric, the film can be made thin to support smaller transistor geometries, while the surface of the channel region can be made smooth to support high electron mobility. Also provided are CVD, sputtering, and evaporation deposition methods for the above-mentioned, trivalent metal doped high dielectric films.Other References
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