Method of increasing data reliability of a flash memory device without compromising compatibility
February 25, 2019. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor memory device having error correcting function Solid state disk memory using storage devices with defects Semiconductor disk system having a plurality of flash memories Error checking and correcting for burst DRAM devices Multiple-bit error correction in computer main memory Fault-tolerant method and means for managing access to an initial program load stored in read-only memory or the like Method and apparatus for performing error detection and correction with memory devices Memory card with error correction scheme requiring reducing memory capacity Patent #: 5958079 InventorApplicationNo. 258163 filed on 02/25/1999US Classes:365/200, Bad bit714/746, Digital data error correction714/763, Memory access714/764, Error correct and restore714/773Solid state memoryExaminersPrimary: Nelms, David C.Assistant: Nguyen, Hiep T. Attorney, Agent or FirmInternational ClassG11C 007/00AbstractA method for increasing the data reliability of a flash memory device without compromising compatibility with existing memory products or an existing memory format makes only minor modifications to the flash memory device. Inside the flash memory device which supports a low power Error Correcting Code known as Hamming Code, the flash memory cells are divided into groups called blocks. Each block is further divided into units called sectors. Each sector is partioned into well defined areas of bits including: SCRATCH DATA, DATA STATUS, and BLOCK STATUS. According to the method, the bits in DATA STATUS and BLOCK STATUS are modified within the specifications of the existing memory format so they can serve as indicators of the increased data reliability capacity of the flash memory device but continue to carry out the function allocated by the existing memory format. Additionally, the SCRATCH DATA is converted into a repository for the data reliability bits for a high power Error Correcting Code (HP ECC). Finally, a newly-designed controller is utilized to perform the Hamming Code or the HP ECC on the data bits being programmed into or read from the flash memory device. The DATA STATUS and the BLOCK STATUS are decoded to determine which ECC to perform on the data bits. | |
