Low power serial analog-to-digital converter
February 23, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesHigh speed NXM bit digital, repeated addition type multiplying circuit Analog-to-digital conversion Full adder circuit using differential transistor pairs Adder using multi-state logic Adder cell having a sum part and a carry part Digital error correction system for subranging analog-to-digital converters Logic level shifting circuit with minimal delay Operational track-and-hold amplifier High speed digital computing system Digital adder circuit InventorAssigneeApplicationNo. 027759 filed on 02/23/1998US Classes:341/161, Acting sequentially327/491, With emitter follower341/155Analog to digital conversionExaminersPrimary: Williams, Howard L.Assistant: JeanPierre, Peguy Attorney, Agent or FirmInternational ClassH03M 001/38AbstractA low power serial A/D converter cascades multiple stages (20) of a novel track-and-hold circuit (22) to implement a pipelined A/D converter. The track-and-hold circuit (22) is implemented using a differential structure to cancel out signal droop. This allows extremely high tracking bandwidths to be achieved while maintaining long hold times. Each stage (20) of the pipeline includes a binary quantizing circuit (24) which performs a 1-bit binary estimate of the data and a summing circuit (26) which updates the output of its track-and-hold circuit (22) to allow the next bits to be decided by the following stages.Field of SearchActing sequentiallyCurrent mirror Field effect transistor Differential encoder and/or decoder (e.g., delta modulation, differential pulse code modulation) Sampled and held input signal with linear return to datum Sampled and held input signal with nonlinear return to datum Differential input Converging with plural inputs and single output Bipolar transistor With emitter follower | |
