U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Accomodating components

Patent 6035407 Issued on March 7, 2000. Estimated Expiration Date: Icon_subject July 15, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Electrical current source circuitry for a bus
Patent #: 5254883
Issued on: 10/19/1993
Inventor: Horowitz, et al.

Programmable clock circuit
Patent #: 5345109
Issued on: 09/06/1994
Inventor: Mehta

Nonvolatile memory with automatic power supply configuration
Patent #: 5363335
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Inventor: Jungroth, et al.

Method and apparatus for power-source wiring design of semiconductor integrated circuits
Patent #: 5404310
Issued on: 04/04/1995
Inventor: Mitsuhashi

Gil edge rate control circuit
Patent #: 5483188
Issued on: 01/09/1996
Inventor: Frodsham

Register for identifying processor characteristics
Patent #: 5493683
Issued on: 02/20/1996
Inventor: Cloud, et al.

Computer system with externally accessible upgrade capability
Patent #: 5530620
Issued on: 06/25/1996
Inventor: Sangveraphunsiri

Microprocessor with a core that operates at multiple frequencies
Patent #: 5537581
Issued on: 07/16/1996
Inventor: Conary, et al.

Fast transmission line implemented with receiver, driver, terminator and IC arrangements
Patent #: 5548226
Issued on: 08/20/1996
Inventor: Takekuma, et al.

High speed I/O circuit having a small voltage swing and low power dissipation for high I/O count applications
Patent #: 5550496
Issued on: 08/27/1996
Inventor: Desroches

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Inventors

Assignee

Application

No. 680487 filed on 07/15/1996

US Classes:

713/300COMPUTER POWER CONTROL

Examiners

Primary: Sheikh, Ayaz R.
Assistant: Pancholi, Jigar

Attorney, Agent or Firm

International Class

G06F 001/00

Abstract

A computer includes a packaged integrated circuit having an information storage area containing information determined only after the integrated circuit is packaged and tested, and a control circuit that uses the information to configure the computer. A computer also may include a bus line connecting two GTL electronic components at a single termination point and a pull-up resistor connecting the termination point to a termination voltage supply.

Other References

  • NEC, VR4000-Series™ Architecture Including VR4400™User's Manual, PLL Passive Components, pp. E-1-E-3, .COPYRGT. 1993, MIPS Technologies, Inc
  • Universal Serial Bus Specification, Revision 1.0, Compaq Computer Corporation et al., pp. 1-268 (Jan. 1996)
  • Access.bus Specification, Version 3.0, Access.bus Industry Group, pp. 1-1 to 9-7 (Sep. 1995)
  • PCI Local Bus Specification, Production Version, Revision 2.1, pp. 1-281 (Jun. 1995)
  • Amiga Hardware Reference Manual, 3rd Ed., Commodore-Amiga, Inc., pp. 383-439 (1991)
  • Haynie, D., "Addendum to the Zorro III Bus Specification, Zorro III Bus Timing," Revision 1.0, Commodore-Amiga, Inc. pp. 1-12 (Apr. 1993)
  • Kunzman, A.J. et al., "1394 High Performance Serial Bus: The Digital Interface for ATC," IEEE Transactions on consumer Electroncs, vol. 14, pp. 893-900 (Aug. 1995)
  • Heinrich, J., "Pll Passive Components," MIPS R4000 Users Manual, pp E-1 to E-3, (1993)
  • Pentium.RTM. Pro Family Developer's Manual, Electrical Specification, Intel, vol. 1: Specification, pp. 11-7 to 11-8, (Jan. 1996
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