Silicon and oxygen ion co-implantation for metallic gettering in epitaxial wafers
October 21, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesProcess for producing semiconductor device Method of fabricating MOS device on a SOS wafer by stabilizing interface region with silicon and oxygen implant Process of gettering semiconductor devices Gettering process with multi-step annealing and inert ion implantation Process for producing semiconductor device Epitaxial silicon wafers for CMOS integrated circuits Method of manufacturing a semiconductor substrate Method for fabricating a multilayer epitaxial structure Process for producing Semiconductor silicon wafer Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth InventorsAssigneeApplicationNo. 954960 filed on 10/21/1997US Classes:438/473, By implanting or irradiating257/E21.318, Of silicon body, e.g., for gettering (EPO)257/E21.321, Thermally inducing defects using oxygen present in silicon body for intrinsic gettering (EPO)257/E21.335In Group IV semiconductor (EPO)ExaminersPrimary: Dutton, BrianAttorney, Agent or FirmForeign Patent References
International ClassH01L 021/322AbstractA novel method of generating intrinsic gettering sites in epitaxial wafers employs co-implanting silicon and oxygen into a substrate of the wafer, annealing the substrate at a low temperature, and then depositing the epitaxial layer on a surface of the substrate. The epitaxial deposition acts as an in-situ anneal to form dislocation loops that act as gettering sites. Oxygen precipitate clusters form during the method, which clusters act to anchor the dislocation loops and prevent them from gliding to the wafer surface over time.Other References
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