Method for forming high dielectric constant metal oxides
Patent 6020024 Issued on February 1, 2000. Estimated Expiration Date: 
August 4, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
August 4, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesProcess for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process Multi-LOCOS (local oxidation of silicon) isolation process Process for growing a film epitaxially upon an oxide surface and structures formed with the process Method of fabricating an isolation region for semiconductor device Method of making deep sub-micron meter MOSFET with a high permitivity gate dielectric Patent #: 5834353 InventorsAssigneeApplicationNo. 905755 filed on 08/04/1997US Classes:427/248.1, COATING BY VAPOR, GAS, OR SMOKE257/E21.193, On single crystalline silicon (EPO)257/E21.435, Lateral single gate single channel silicon transistor with both lightly doped source and drain extensions and source and drain self-aligned to sides of gate, e.g., LDD MOSFET, DDD MOSFET (EPO)257/E29.16, Gate conductor material being compound or alloy material (e.g., organic material, TiN, MoSi 2 ) (EPO)257/E29.165, Multiple layers (EPO)427/255.7, Plural coatings applied by vapor, gas, or smoke427/309, Inorganic base427/527, Silicon present in substrate, plating, or implanted layer438/287Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compoundExaminersPrimary: King, Roy V.Attorney, Agent or FirmForeign Patent References
International ClassesC23C 016/00H01L 021/336 AbstractA method for forming a metal gate (20) structure begins by providing a semiconductor substrate (12). The semiconductor substrate (12) is cleaned to reduce trap sites. A nitrided layer (14) having a thickness of less than approximately 20 Angstroms is formed over the substrate (12). This nitrided layer prevents the formation of an oxide at the substrate interface and has a dielectric constant greater than 3.9. After the formation of the nitrided layer(14), a metal oxide layer (16) having a permittivity value of greater than roughly 8.0 is formed over the nitrided layer (14). A metal gate (20) is formed over the nitrided layer whereby the remaining composite gate dielectric (14 and 16) has a larger physical thickness but a high-performance equivalent oxide thickness (EOT).Other References
Field of SearchCOATING BY VAPOR, GAS, OR SMOKESilicon present in substrate, plating, or implanted layer Plural coatings applied by vapor, gas, or smoke Inorganic base Gate insulator structure constructed of diverse dielectrics (e.g., MNOS, etc.) or of nonsilicon compound Recessed oxide by localized oxidation (i.e., LOCOS) And electrical conductor formation (i.e., metallization) Specified deposition material or use | |
