Electronic interconnection method and apparatus for minimizing propagation delays

Patent 6015300 Issued on January 18, 2000. Estimated Expiration Date:

August 28, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

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Patent #: 5289340
Issued on: 02/22/1994
Inventor: Yoshifuji

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Inventor: Stucke

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Issued on: 12/10/1996
Inventor: Poole

Inventors

Assignee

Ascend Communications, Inc.

Application

No. 919825 filed on 08/28/1997

US Classes:

439/61, Receives plural panel circuit edges361/788Having backplane connection

Examiners

Primary: Stephan, Steven L.
Assistant: Patel, T. C.

Attorney, Agent or Firm

Weingarten, Schurgin, Gagnebin & Hayes LLP

International Class

H01R 009/09

Abstract

A module interconnection system which minimizes electronic signal propagation delays is disclosed. The module interconnection system includes a backplane, a first plurality of connectors arranged in a side by side generally parallel arrangement, and a second plurality of connectors arranged in a side by side generally parallel arrangement. In a preferred embodiment, the second plurality of connectors are mounted on the backplane at right angles to the first plurality of connectors so as provide short routing paths between each of the second plurality of connectors and at least one of the first plurality of connectors. Point-to-point signal interconnections are selectively utilized to provide data paths between selected contacts of at least one of the first plurality of connectors and selected contacts of the second plurality of connectors. The above described interconnection apparatus permits high speed data communication between modules disposed in at least one of said first plurality of connectors and at least one module disposed in said second plurality of connectors.