Use of multiple slots surrounding base region of a bipolar junction transistor to increase cumulative breakdown voltage
July 18, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor device High breakdown voltage semiconductor device Process for forming slots having near vertical sidewalls at their upper extremities Process for forming isolation slots having immunity to surface inversion Process for forming slots of different types in self-aligned relationship using a latent image mask Method of making an isolation slot for integrated circuit structure Method for planarizing an isolation slot in an integrated circuit structure Integrated circuit structure with active elements of bipolar transistor formed in slots Method of making fully self-aligned bipolar transistor involving a polysilicon collector contact formed in a slot with an oxide sidewall Vertical slot bottom bipolar transistor structure InventorAssigneeApplicationNo. 897167 filed on 07/18/1997US Classes:257/526, With bipolar transistor structure257/508, With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)257/511, With complementary (npn and pnp) bipolar transistor structures257/517, With bipolar transistor structure257/592, With base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base))257/E29.02, Isolation by dielectric regions (EPO)257/E29.044, Base region of bipolar transistors (EPO)257/E29.184Having emitter-base and base-collector junctions in same plane (EPO)ExaminersPrimary: Hardy, David B.Attorney, Agent or FirmInternational ClassH01L 029/732AbstractA semiconductor device having the base region surrounded by at least two continuous slots. The collector region is surrounded by at least one continuous slot formed as a continuation of one of the at least two continuous slots surrounding the base region. The portions of the slots that are over the buried layer extends beyond the surface of the buried layer and the portions of the slots not over the buried layer extends beyond the interface between the epitaxial layer and the substrate. The slots are filled with either polysilicon or tungsten. The base region terminates on the surface of the innermost slot surrounding the base region. The boundary of the base region terminates substantially perpendicular to the surface of the surrounding slot.Field of SearchWith base region having specified doping concentration profile or specified configuration (e.g., inactive base more heavily doped than active base or base region has constant doping concentration portion (e.g., epitaxial base))Including dielectric isolation means With complementary (npn and pnp) bipolar transistor structures With bipolar transistor structure | |
