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Electrical fuses with tight pitches and method of fabrication in semiconductors

Patent 6008523 Issued on December 28, 1999. Estimated Expiration Date: Icon_subject August 26, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Method of making an intergrated vertical NPN and vertical oxide fuse programmable memory cell
Patent #: 4635345
Issued on: 01/13/1987
Inventor: Hankins ,   et al.

Electric fuse for a redundancy circuit
Patent #: 4984054
Issued on: 01/08/1991
Inventor: Yamada, et al.

Module level electronic redundancy
Patent #: 5313424
Issued on: 05/17/1994
Inventor: Adams, et al.

ZAG fuse for reduced blow-current application
Patent #: 5420456
Issued on: 05/30/1995
Inventor: Galbi, et al.

Vertical fuse device
Patent #: 5436496
Issued on: 07/25/1995
Inventor: Jerome, et al.

Fuse bank
Patent #: 5661331
Issued on: 08/26/1997
Inventor: Hebbeker, et al.

Laser fusible link structure for semiconductor devices
Patent #: 5747868
Issued on: 05/05/1998
Inventor: Reddy, et al.

Space saving laser programmable fuse layout Patent #: 5844296
Issued on: 12/01/1998
Inventor: Murray, et al.

Inventors

Assignee

Application

No. 140573 filed on 08/26/1998

US Classes:

257/529, Including programmable passive component (e.g., fuse)257/209, Programmable signal paths (e.g., with fuse elements, laser programmable, etc)257/E23.149Comprising fuses, i.e., connections having their state changed from conductive to nonconductive (EPO)

Examiners

Primary: Saadat, Mahshid
Assistant: Eckert, George

Attorney, Agent or Firm

Foreign Patent References

  • 3-124047 JP. 05/21/1991

International Class

H01L 029/00

Abstract

A semiconductor device includes an array of electrical fuses having a structure which permits tight fuse pitches while enabling electrical fusing at voltages of about 10 volts or less. The fuses are useful to replace defective components of the device and/or to permit custom wiring. The semiconductor device includes a substrate with a tight pitch array of fuses including a plurality of fuse links of selective cross sectional area in closely adjacent arrangement, each connected at one end to an individual connector terminal of larger cross sectional area than that of the fuse link, and at another end to a common connector terminal of larger cross sectional area than that of the individual connector terminals. The common connector terminal is typically held at a less positive potential than one of the individual connector terminals during the time a fuse link thereat is to be opened such that electron flow is in a direction from the common connector terminal to the fuse link. The common connector terminal cross sectional area is desirably about 2 or more times that of the individual fuse links to enable electrical fusing at voltages of about 10 volts or less.

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