U.S. patents available from 1976 to present.
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Network connector operable in bridge mode and bypass mode

Patent 6006275 Issued on December 21, 1999. Estimated Expiration Date: Icon_subject October 6, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

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Inventors

Assignee

Application

No. 167306 filed on 10/06/1998

US Classes:

709/249, MULTIPLE NETWORK INTERCONNECTING370/351, PATHFINDING OR ROUTING370/401, Bridge or gateway between networks370/404Ring or loop forms backbone for interconnecting other networks

Examiners

Primary: Shin, Christopher B.

Attorney, Agent or Firm

International Class

G06F 013/00

Abstract

A hub circuit with an integrated bridge circuit carried out in software including a switch for bypassing the bridge process such that the two bridged networks effectively become one network. An in-band management process in software is disclosed which receives and executes network management commands received as data packets from the LANs coupled to the integrated hub/bridge. Also, hardware and software to implement an isolate mode where data packets which would ordinarily be transferred by the bridge process are not transferred except in-band management packets are transferred to the in-band management process regardless of which network from which they arrived. Also disclosed, a packet switching machine having shared high-speed memory with multiple ports, one port coupled to a plurality of LAN controller chips coupled to individual LAN segments and an Ethernet microprocessor that sets up and manages a receive buffer for storing received packets and transferring pointers thereto to a main processor. The main processor is coupled to another port of the memory and analyzes received packets for bridging to other LAN segments or forwarding to an SNMP agent. The main microprocessor and the Ethernet processor coordinate to manage the utilization of storage locations in the shared memory. Another port is coupled to an uplink interface to higher speed backbone media such as FDDI, ATM etc. Speeds up to media rate are achieved by only moving pointers to packets around in memory as opposed to the data of the packets itself. A double password security feature is also implemented in some embodiments to prevent accidental or intentional tampering with system configuration settings.

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