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Compiler-oriented apparatus for parallel compilation, simulation and execution of computer programs and hardware models

Patent 5999734 Issued on December 7, 1999. Estimated Expiration Date: Icon_subject October 21, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

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Inventors

Assignee

Application

No. 954843 filed on 10/21/1997

US Classes:

717/149, For a parallel or multiprocessor system709/200, MISCELLANEOUS709/201, DISTRIBUTED DATA PROCESSING712/1, PROCESSING ARCHITECTURE712/15, Reconfiguring712/28Distributed processing system

Examiners

Primary: An, Meng-Ai T.
Assistant: El-Hady, Nabil

Attorney, Agent or Firm

International Class

G06F 009/45

Abstract

A distributed, compiler-oriented database is disclosed with operating modes including parallel compilation, parallel simulation and parallel execution of computer programs and hardware models. The invention utilizes a hardware apparatus consisting of shared memory multiprocessors, optionally augmented by processors with re-configurable logic execution pipelines or independently scheduled re-configurable logic blocks and a software database apparatus, manifest in the hardware apparatus, in order to efficiently support parallel database clients such as a source code analyzer, an elaborator, an optimizer, mapping and scheduling, code generation, linking/loading, execution/simulation, debugging, profiling, user interface and a file interface.

Other References

  • J. Auslander et al., "Fast, Effective Dynamic Compilation", appears in Proceedings of PLDI '96, pp. 149-159, Pennsylvania, May 1996
  • J-L. Baer et al., "Model, Design, and Evaluation of a Compiler for a Parallel Processing Environment", IEEE Transactions on Software Engineeing, vol. SE-3, No. 6, Nov. 1977
  • Bernstein et al., "Distributed Compilation of VHDL", Vantage Analysis Systems, Inc., Spring 1992 VHDL International User's Group Meeting, May, 1992
  • R. Chandra et al., "Data Distribution Support on Distributed Shared Memory Multiprocessors", appears in Proceeding of PLDI '97, pp. 334-345, Las Vegas, Nevada
  • D. Engler, "VCODE: A Retargetable, Extensible, Very Fast Dynamic Code Generation System", appears in Proceeding of PLDI '96, pp. 160-170, Pennsylvania, May 1996
  • K. Hering et al., "Hierarchical Strategy of Model partitioning for VLSI-Design Using an Improved Mixture of Experts Approach", 10th Workshop on Parallel and Distributed Simulation, (PADS '96), May 1996
  • D. Skillicorn et al., "Parallel Compilation: A Status Report", External Technical Report, Queen's University, March 1990
  • J. Willis, "Auriga: A Compiler that Addresses NUMA Architectures", WESCON/96 IC EXPO Applications Conference on Communications and Computer Technologies, Anaheim, CA, 1996
  • J. willis et al., "MinSim: Optimized, Compiled VHDL Simulation Using Networked & Parallel Computers", appears in Proceedings of Fall 1993 VHDL International User's Forum
  • J. Willis et al., "Optimizing VHDL Compilation for Parallel Simulation", IEEE Design & Test of Computers, Sep. 1992, pp. 42-53
  • J. Willis, "Optimizing VHDL Compilation for Parallel Simulation", Carnegie Mellon University Dissertation, Pittsburgh, Pennsylvania, 199
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