Communications system for receiving and transmitting data cells
October 24, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesData communication arrangement with embedded matrix switch Digital key stystem architecture Bus-oriented switching system for asynchronous transfer mode Multi-service switch for a telecommunications network Buffered crosspoint matrix for an asynchronous transfer mode switch and method of operation Method for switching data flow in a fiber distributed interface (FDDI) system Patent #: 5539733 InventorsAssigneeApplicationNo. 727535 filed on 10/24/1996US Classes:370/365, Separate transmit and receive buses370/380, Space switch, per se (e.g., S or S-S)370/395.71Having input or output storage or bothExaminersPrimary: Nguyen, ChauAttorney, Agent or FirmInternational ClassH04L 012/56Foreign Application Priority Data1994-04-29 GBAbstractA communication system comprising a hub slot adapted to receive any one of a plurality of hub cards for receiving and transmitting data cells; a plurality of universal card slots; a plurality of interface cards insertable in any one of the plurality of universal card slots for receiving incoming ones of the data cells containing data and transmitting outgoing ones of the data cells containing data; an add bus having respective data links connected between individual ones of the universal card slots and the hub slot for receiving the outgoing ones of the data cells from the plurality of interface cards and transmitting the outgoing ones of the data cells to the hub slot; a drop bus having a single data link connected between all of the universal card slots and the hub slot for transmitting the incoming ones of the data cells from the hub slot to the plurality of interface cards; and an arrangement within each of the interface cards for filtering the incoming ones of the data cells from the drop bus and thereby routing the data cells to an appropriate one or more of the plurality of interface cards.Field of SearchFault detectionOf a switching system Of a switching system Combined circuit switching and packet switching Through a circuit switch Switching input signals having different aggregate bit rates Input or output circuit, per se (i.e., line interface) Bus switch Having plural buses Separate transmit and receive buses Space switch, per se (e.g., S or S-S) Having a supervisory signaling feature Multistage switch Switching a message which includes an address header Replicate messages for multiple destination distribution Switching input signals having different aggregate bit rates Centralized switching Employing logical addressing for routing (e.g., VP or VC) Having multistage switching Path selection or routing Alternate routing | |
