Data link controller with autonomous in tandem pipeline circuit elements relative to network channels for transferring multitasking data in cyclically recurrent time slots
Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory
Apparatus and method for protecting data in a memory address range
Scalable cache attributes for an input/output bus
Method and software products for continued application execution after generation of fatal exceptions Patent #: 5815702
AbstractA method for protecting a computer operating system from unexpected errors write-protects certain critical system components, thereby preventing corruption by application programs, and handles otherwise fatal program errors and infinite loops outside of the context of a malfunctioning program, permitting the program to be reactivated.