Performance monitor and method for performance monitoring within a data processing system
Patent 5991708 Issued on November 23, 1999. Estimated Expiration Date: 
July 7, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
July 7, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3723975 3771144 3818458 3906454 Computer system performance indicator Storage hierarchy performance monitor Programmable hit matrices used in a hardware monitoring interface unit Internally distributed monitoring system Internal performance monitoring by event sampling Workstation controller performance monitor InventorsApplicationNo. 888802 filed on 07/07/1997US Classes:702/186, Computer and peripheral benchmarking714/39Monitor recognizes sequence of events (e.g., protocol or logic state analyzer)ExaminersPrimary: Assouad, PatrickAttorney, Agent or FirmInternational ClassG06F 011/25AbstractThe present invention provides a performance monitor including a threshold indicator, a granularity indicator, an event detector, and an event counter. The threshold indicator indicates a number of threshold increments, which each correspond to a number of occurrences of a first event. The granularity indicator indicates the number of occurrences of the first event corresponding to each of the threshold increments indicated by the threshold indicator. The granularity indicator has at least a first state and a second state such that the granularity indicator indicates that a first number of occurrences of the first event correspond to a threshold increment in the first state and that a different second number of occurrences of the first event correspond to a threshold increment in the second state. In response to a number of occurrences of the first event detected by the event detector during a selected interval exceeding the number of occurrences indicated by the threshold value and the granularity indicator, the event counter is incremented. In one embodiment, each occurrence of the first event corresponds to a processor clock cycle and the selected interval is defined as the duration of a memory access.Other References
Field of SearchPerformance or efficiency evaluationComputer and peripheral benchmarking Fault locating (i.e., diagnosis or testing) Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path) Monitor recognizes sequence of events (e.g., protocol or logic state analyzer) Performance monitoring for fault avoidance | |
