Virtual monitor debugging method and apparatus
November 12, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSource-level in-circuit software code debugging instrument Bus interface circuit for dual personal computer architecture peripheral adapter board JTAG component description via nonvolatile memory High-speed integrated circuit testing with JTAG Method and system for controlling/monitoring computer system having plural operating systems to run thereon Fault injection using boundary scan Method and apparatus for synchronizing a JTAG test control signal to an on-chip clock signal Automatic immune system for computers and computer networks Debugger operable with only background monitor Microprocessor with an external command mode for diagnosis and debugging InventorsAssigneeApplicationNo. 745526 filed on 11/12/1996US Classes:717/129, Using breakpoint703/13, SIMULATING ELECTRONIC DEVICE OR ELECTRICAL SYSTEM703/23, EMULATION714/30, Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path)714/46, Operator interface for diagnosing or testing714/724, Digital logic testing716/4Testing or evaluatingExaminersPrimary: Hafiz, Tariq R.Assistant: Dam, Tuan Q. Foreign Patent References
International ClassesG06F 011/00500.44 527 AbstractA virtual monitor controller includes a data storage device coupled to receive and output data; an instruction storage device coupled to receive and output instructions; a status storage device coupled to receive and output status data; and a mode storage device coupled to receive and output mode data. The virtual monitor controller is included in a debugger/monitor controller. A debugger/monitor system comprises a host system; the debugger/monitor controller; and a digital processor. Preferably, the controller is coupled between the processor and IC logic. A method of operating a virtual monitor comprises the steps of intercepting an instruction fetch from a microprocessor; downloading instructions from a host computer; and operating the microprocessor with the instructions. Preferably, the instructions are sequentially downloaded.Other References
Field of SearchBuilt-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path)Analysis (e.g., of output, state, or design) Of computer software Monitor recognizes sequence of events (e.g., protocol or logic state analyzer) Output recording (e.g., signature or trace) Error detection or notification Digital logic testing Operator interface for diagnosing or testing Scan path testing (e.g., level sensitive scan design (LSSD)) Built-in testing circuit (BILBO) Structural (in-circuit test) | |
