Patent ReferencesProgram control apparatus incorporating a trace function High speed microcomputer in-circuit emulator Processing system for providing an in circuit emulator with processor internal state Method of measuring cumulative processing time for modules required in process to be traced Debug support in a processor chip Computer program debugging system and method Trace analysis of data processing Method and apparatus for providing precise fault tracing in a superscalar microprocessor Integrated circuit with multiple functions sharing multiple internal signal buses according to distributed bus access and control arbitration Method to test the running of a program of instructions carried out by an ASIC and ASIC pertaining thereto InventorAssigneeApplicationNo. 992276 filed on 12/17/1997US Classes:712/227, Specialized instruction processing in support of testing, debugging, emulation714/27Particular access structureExaminersPrimary: Treat, William M.Attorney, Agent or FirmForeign Patent References
International ClassG06F 011/00AbstractA debug interface supports data transfer using read and write system calls that communicate data without stopping an executing kernel. The printf( ) command passes an information string to an executing operating system. The information string summons the operating system to use a serial debug port to signal to a debug device, such as a host system, that is connected to the serial port. The debug interface-supported read and write operations and system calls allow the kernel and executing applications software, respectively, to continue executing during the read and write data transfers. The debug interface includes support for a plurality of extended function sideband signals that extend the functionality of the read and write functionality to allow the processor to concurrently run kernel and application programs while transferring data using read and write operation. The extended function sideband signals include a command acknowledge signal (CMDACK), a dual-purpose break execution and trace control signal (BRTC), an execution stopped and receive data signal (STOPTX), and an off-chip trigger event signal (TRIG). The debug interface further includes a buffer for transferred data The kernel may run a first data transfer command which is not fully transmitted when a second data transfer command is issued. The operating system supports buffering of the data evoked by the second data transfer command using a conventional queuing operation.Other References
Field of SearchSpecialized instruction processing in support of testing, debugging, emulationParticular access structure Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path) Of computer software Substituted emulative component (e.g., emulator microprocessor) | |