Highly integrated chip-on-chip packaging
June 26, 2018. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesChip on chip type integrated circuit device System for connecting integrated circuit dies to a printed wiring board Multichip module having a stacked chip arrangement Multi-chip semiconductor arrangements using flip chip dies Process of bonding semiconductor wafers having conductive semiconductor material extending through each wafer at the bond areas Semiconductor integrated circuit device and computer system using the same Electrical contact and method for making an electrical contact Three dimensional die packaging in multi-chip modules Semiconductor chip carrier affording a high-density external interface Semiconductor module having multiple insulation and wiring layers InventorsApplicationNo. 105419 filed on 06/26/1998US Classes:257/777, Chip mounted on chip257/686, Stacked arrangement257/738, Ball shaped257/778, Flip chip257/780, Ball or nail head type contact, lead, or bond257/E25.013, Stacked arrangements of devices (EPO)361/729, Plural361/735StackedExaminersPrimary: Thomas, TomAssistant: Thai, Tuan V. Attorney, Agent or FirmInternational ClassH01L 023/48AbstractThe advantages of the invention are realized by a chip-on-chip module having at least two fully functional chips, electrically connected together, and a chip-on-chip component connection/interconnection for electrically connecting the fully functional chips to external circuitry.Other References
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