Patent ReferencesMethod of making asymmetrically optimized CMOS field effect transistors Method of making flash memory with high coupling ratio Method of fabricating field effect transistors having lightly doped drain regions Method for fabricating semiconductor device with planarization step using CMP Patent #: 5733818 InventorsApplicationNo. 699410 filed on 08/19/1996US Classes:438/664, Forming silicide257/E21.165, Conductive layer comprising silicide (EPO)257/E21.199, Conductor comprising silicide layer formed by silicidation reaction of silicon with metal layer (EPO)257/E21.335, In Group IV semiconductor (EPO)257/E21.337, Through-implantation (EPO)257/E21.338, Recoil-implantation (EPO)257/E21.435, Lateral single gate single channel silicon transistor with both lightly doped source and drain extensions and source and drain self-aligned to sides of gate, e.g., LDD MOSFET, DDD MOSFET (EPO)257/E21.438, Using self-aligned silicidation, i.e., salicide (EPO)257/E21.633, With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (EPO)438/649, Silicide438/651, Silicide438/659, Implantation of ion into conductor438/683, Of refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)438/685Refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof)ExaminersPrimary: Bowers, CharlesAssistant: Berry, Renee R. International ClassH01L 021/44Foreign Application Priority Data1995-10-04 JPAbstractA semiconductor device and a fabrication method thereof are disclosed. A silicon nitride film is formed over a silicon semiconductor substrate. Impurity ions are then implanted into desired areas of the silicon semiconductor substrate, so that nitrogen atoms and silicon atoms from the silicon nitride film are incorporated into the surface of the silicon semiconductor substrate together with introduction of impurity ions. The silicon semiconductor substrate has a minimized content of oxygen mixed thereinto and restored crystal defects filled by nitrogen atoms upon implanting of impurity ions. The fabricated semiconductor device is free from a trade-off relation between gate-electrode depletion and junction current leakage, and short-channel effects.Other References
Field of SearchFrom solid dopant source in contact with semiconductor regionTo compound semiconductor Implantation of ion into conductor Utilizing reflow Silicide Simultaneous (e.g., chemical-mechanical polishing, etc.) Multiple interelectrode dielectrics or nonsilicon compound gate insulator Tunneling insulator Tunnelling dielectric layer Silicide Silicide Forming silicide Of refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) Refractory group metal (i.e., titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), tungsten (W), or alloy thereof) | |