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Receiver circuit

Patent 5953643 Issued on September 14, 1999. Estimated Expiration Date: Icon_subject October 11, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Direct conversion FM receiver
Patent #: 5003621
Issued on: 03/26/1991
Inventor: Gailus

Directly mixing synchronous AM receiver
Patent #: 5093930
Issued on: 03/03/1992
Inventor: Kasperkovitz

Offset correction circuit
Patent #: 5422889
Issued on: 06/06/1995
Inventor: Sevenhans, et al.

Method for automatically compensating for accuracy degradation of a reference oscillator
Patent #: 5552749
Issued on: 09/03/1996
Inventor: Nowatski, ;, , , --> Nowatski, et al.

Direct conversion receiver for multiple protocols
Patent #: 5557642
Issued on: 09/17/1996
Inventor: Williams

Apparatus and method for minimizing the turn on time for a receiver operating in a discontinuous receive mode
Patent #: 5678227
Issued on: 10/14/1997
Inventor: Connell, et al.

Method and apparatus for using full spectrum transmitted power in a spread spectrum communication system for tracking individual recipient phase, time and energy
Patent #: 5691974
Issued on: 11/25/1997
Inventor: Zehavi, et al.

Zero intermediate frequency receiver
Patent #: 5715281
Issued on: 02/03/1998
Inventor: Bly, deceased, et al.

Phase shifter and communication system using the phase shifter
Patent #: 5736840
Issued on: 04/07/1998
Inventor: Otaka, et al.

Wide band zero if quadrature demodulator using a intermediate frequency and a single local oscillator Patent #: 5761615
Issued on: 06/02/1998
Inventor: Jaffee

Inventors

Application

No. 730686 filed on 10/11/1996

US Classes:

455/324, Homodyne (i.e., zero beat or synchrodyne reception)375/319Automatic bias circuit for DC restoration

Examiners

Primary: Vu, Huy D.
Assistant: Lee, Chiho Andrew

Attorney, Agent or Firm

Foreign Patent References

  • 0344467B1 EP. 12/13/1989
  • 0523779A1 EP. 01/13/1993
  • 0599409 EP. 06/13/1994

International Class

H04B 001/26

Foreign Application Priority Data

1995-10-11 GB

Abstract

A receiver circuit, particularly an integrated, zero IF receiver circuit in which a direct conversion IF stage is separated from an antenna by a further fequency conversion stage which is AC coupled to the direct conversion IF stage. A single crystal oscillator generates a frequency which is multiplied prior to being applied as a local oscillator signal to the further frequency conversion stage and is used to produce another frequency, which is divided to block harmonics, prior to being applied as quadrature related local oscillator signals to the direct conversion IF stage. The direct coversion IF stage includes several dc nulling for compensating for dc offsets.

Other References

  • Philips Journal of Research, vol. 41, No. 3, 1986, pp. 219-231, "Some Features of Signal Demodulation Resulting from the Practical Implementation of a Direct Conversion Radio Receiver", by R.A. Brown, R.J. Dewey and C.J. Collier
  • Wayne Tomasi, Electronic Communications Systems Fundamental, Prentice-Hall, p. 145, 199
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