Method and apparatus for automatic average current mode controlled power factor correction without input voltage sensing
Patent 5920471 Issued on July 6, 1999. Estimated Expiration Date: 
August 29, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
August 29, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesAC to DC power converter with integrated line current control for improving power factor Push-pull converter current limiter Power factor correction circuit Power supply with power factor correction and protection against failures of the power factor correction Input current shaping technique and low pin count for pfc-pwm boost converter Patent #: 5742151 InventorsAssigneeApplicationNo. 921062 filed on 08/29/1997US Classes:363/89, With transistor control means in the line circuit323/288, With ramp generator or controlled capacitor charging363/48, For semiconductor rectifier363/80With transistor as control means in the line circuitExaminersPrimary: Wong, Peter S.Assistant: Vu, Bao Q. Attorney, Agent or FirmForeign Patent References
International ClassesH02M 001/12H02M 005/42 G05F 001/40 AbstractA method for preparing power factor control integrated circuits which generate linear pulse width modulation (PWM) waveforms is presented. The method of pulse width modulation waveform generation involves providing a capacitor; fast charging the capacitor; and controlling a discharge rate of the capacitor to ensure a constant switching period and a linear PWM waveform. The method is applicable for any single-phase ac/dc converter topology that performs power factor correction. Unlike conventional techniques which utilize three feedback loops, the method of the present invention reduces the total number of feedback loops to two, eliminates input voltage sensing and achieves the same objective. This method results in significant integrated circuit simplification, such as elimination of multiplier, squarer and divider circuits in the control integrated circuit and reduces the cost of the integrated circuit.Field of SearchIn rectifier systemsWith low pass L or LC filter For semiconductor rectifier With condition responsive means to control the output voltage or current With transistor as control means in the line circuit By rectifier With transistor control means in the line circuit With plural condition sensing With ramp generator or controlled capacitor charging Using choke and switch across source | |
