U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Configurable logic element with ability to evaluate five and six input functions

Patent 5920202 Issued on July 6, 1999. Estimated Expiration Date: Icon_subject April 4, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Re34363

Programmable array logic circuit
Patent #: 4124899
Issued on: 11/07/1978
Inventor: Birkner ,   et al.

Special interconnect for configurable logic array
Patent #: 4642487
Issued on: 02/10/1987
Inventor: Carter

Configurable logic element
Patent #: 4706216
Issued on: 11/10/1987
Inventor: Carter

5-Transistor memory cell which can be reliably read and written
Patent #: 4750155
Issued on: 06/07/1988
Inventor: Hsieh

User programmable integrated circuit interconnect architecture and test method
Patent #: 4758745
Issued on: 07/19/1988
Inventor: Elgamal ,   et al.

5-transistor memory cell with known state on power-up
Patent #: 4821233
Issued on: 04/11/1989
Inventor: Hsieh

Configurable electrical circuit having configurable logic elements and configurable interconnects
Patent #: 4870302
Issued on: 09/26/1989
Inventor: Freeman

Configurable logic array
Patent #: 5001368
Issued on: 03/19/1991
Inventor: Cliff, et al.

Segmented routing architecture
Patent #: 5073729
Issued on: 12/17/1991
Inventor: Greene, et al.

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Inventors

Application

No. 835088 filed on 04/04/1997

US Classes:

326/39, Array (e.g., PLA, PAL, PLD, etc.)326/37, MULTIFUNCTIONAL OR PROGRAMMABLE (E.G., UNIVERSAL, ETC.)326/41Significant integrated structure, layout, or layout interconnections

Examiners

Primary: Tokar, Michael
Assistant: Chang, Daniel D.

Attorney, Agent or Firm

Foreign Patent References

  • 0461798A2 EP. 06/13/1991
  • 0451798A2 EP. 06/13/1991
  • 0 630 115 A2 EP. 12/13/1994
  • 0748049A2 EP. 12/13/1996
  • 0746107A2 EP. 12/13/1996
  • 2300951 GB. 11/13/1995
  • 2 295 738 GB. 06/13/1996
  • WO 93/05577 WO. 08/13/1992
  • WO9410754 WO. 05/13/1994

International Classes

G06F 007/38
H03K 019/173

Abstract

The invention provides a Configurable Logic Element (CLE) preferably included in each of an array of identical tiles. A CLE according to the invention has four function generators. The outputs of two function generators are combined with a fifth independent input in a five-input-function multiplexer or function generator to produce an output that can be any function of five inputs, or some functions of up to nine inputs. The outputs of the other two function generators are similarly combined. The outputs of the two five-input-function multiplexers or function generators are then combined with a sixth independent input in a first six-input-function multiplexer or function generator, and with a different sixth independent input in a second six-input-function multiplexer or function generator. The two six-input-function multiplexers or function generators therefore produce two outputs of which one can be any function of six inputs; the other output can be any function of six inputs provided that five inputs are shared between the two 6-input functions. Some functions of up to nineteen inputs can also be generated in a single CLE.

Other References

  • Xilinx, Inc., "The Programmable Logic Data Book", Sep. 1996, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, pp. (4-188 to 4-190);(4-295 to 4-295); and (13-13 to 13-15)
  • Lucent Technologies, Microelectronics Group, ORCA, "Field-Programmable Gate Arrays Data Book," Oct. 1996, pp. 2-9 to 2-20
  • Altera Corporation, "FLEX 10K Embedded Programmable Logic Family Data Sheet" from the Altera Digital Library, 1996, available from Altera Corporation, 2610 Orchard Parkway, San Jose, CA 95134-2020, pp. 31-53
  • "The Programmable Logic Data Book", 1996, available from Xilinx Inc., 2100 Logic Drive, San Jose, California, 95124, pp. 4-1 to 4-49
  • Neil H. E. Weste and Kamran Eshraghian, "Principles of CMOS VLSI: A System Approach", by AT&T Bell Laboratories, Inc, published by Addison-wesley Publishing Company, copyright 1985, p. 56
  • "The Programmable Gate Array Data Book", 1989, available from Xilinx Inc., 2100 Logic Drive, San Jose, California, 95124, pp. 6-30 through 6-44
  • "The Programmable Logic Data Book", 1993, available from Xilinc Inc., 2100 Logic Drive, San Jose, Califorinia, 95124, pp. 1-1 through 1-7; 2-1 through 2-42; 2-97 through 2-130; and 2-177 through 2-204
  • Luis Morales, "Boundary Scan in XC4000 Devices", XAPP 017.001, Oct. 1992, pp. 2-108 and 2-18
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