U.S. patents available from 1976 to present.
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Heterojunction bipolar semiconductor device

Patent 5912479 Issued on June 15, 1999. Estimated Expiration Date: Icon_subject July 25, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Compound semiconductor integrated circuit device
Patent #: 4821090
Issued on: 04/11/1989
Inventor: Yokoyama

Integrated circuit composed of group III-V compound field effect and bipolar semiconductors
Patent #: 5068756
Issued on: 11/26/1991
Inventor: Morris, et al.

Method for producing integrated quasi-complementary bipolar transistors and field effect transistors
Patent #: 5391504
Issued on: 02/21/1995
Inventor: Hill, et al.

Semiconductor device
Patent #: 5567961
Issued on: 10/22/1996
Inventor: Usagawa, et al.

Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI Patent #: 5583059
Issued on: 12/10/1996
Inventor: Burghartz

Inventors

Assignee

Application

No. 900698 filed on 07/25/1997

US Classes:

257/192, Field effect transistor257/194, Doping on side of heterojunction with lower carrier affinity (e.g., high electron mobility transistor (HEMT))257/195, Combined with diverse type device257/197, Bipolar transistor257/198, Wide band gap emitter257/E21.695, Combination of bipolar and field-effect technologies (EPO)257/E27.015, In combination with bipolar transistor (EPO)257/E29.193, Comprising lattice mismatched active layers (e.g., SiGe strained layer transistors) (EPO)257/E29.315With heterojunction gate (e.g., transistors with semiconductor layer acting as gate insulating layer) (EPO)

Examiners

Primary: Mintel, William

Attorney, Agent or Firm

International Classes

H01L 031/032.8
H01L 031/033.6
H01L 031/072
H01L 031/109

Foreign Application Priority Data

1996-07-26 JP

Abstract

A semiconductor device includes a heterojunction bipolar transistor and a junction gate type field effect transistor which are formed on a semiconductor base. A base region and graft base regions of the heterojunction bipolar transistor, and a channel region and source/drain regions of the junction gate type field effect transistor, are formed of a first semiconductor layer of a first conduction type. The first semiconductor layer is formed of mixed crystals of silicon-germanium which has a higher carrier mobility than silicon. An emitter region of the heterojunction bipolar transistor and a gate region of the junction gate type field effect transistor are formed of a second semiconductor layer of a second conduction type which makes a heterojunction with the first semiconductor layer.

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