Single-chip software configurable transceiver for asymmetric communication system
Patent 5909463 Issued on June 1, 1999. Estimated Expiration Date: 
November 4, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 4, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesPacketized ensemble modem Full-duplex split-speed data communication unit for remote DTE Ensemble modem structure for imperfect transmission media Ensemble modem structure for imperfect transmission media Modem for communicating at high speed over voice-grade telephone circuits Multi-channel trellis encoder/decoder Asymmetric hybrid access system and method Patent #: 5586121 Inventors
AssigneeApplicationNo. 741634 filed on 11/04/1996US Classes:375/220, Transmission interface between two stations or terminals370/276, DUPLEX370/295, Frequency division370/464, COMMUNICATION TECHNIQUES FOR INFORMATION CARRIED IN PLURAL CHANNELS370/480, Combining or distributing information via frequency channels375/219, TRANSCEIVERS375/221, Loopback mode375/222, Modems (data sets)455/73TRANSMITTER AND RECEIVER AT SAME STATION (E.G., TRANSCEIVER)ExaminersPrimary: Chin, StephenAssistant: Maddox, Michael W. Attorney, Agent or FirmInternational ClassesH04B 001/38H04B 001/56 H04L 005/14 H04L 005/16 AbstractA transceiver (5) for an asymmetric communication system such as asymmetric digital subscriber line (ADSL) includes a configuration register (71) defining operation at either a central office (CO) or a remote terminal (RT). The configuration register (71) includes a control bit (72) for selecting either CO or RT mode. The transceiver (5) includes a signal processing module (70) configured according to the state of the control bit (72). For example, a digital interface (70) converts transmit data into transmit symbols and converts received symbols into receive data. The digital interface (70) uses a large memory (158) as a buffer in the transmit path and a small memory (160) as a buffer in the receive path in CO mode. In RT mode, the digital interface (70) uses the small memory (160) in the transmit path and the large memory (158) in the receive path. The selective configuration allows a single integrated circuit to be used in both CO and RT equipment.Other References
Field of SearchTransmission interface between two stations or terminalsTRANSCEIVERS Loopback mode Modems (data sets) Angle modulation DUPLEX Frequency division Convertible to half duplex COMMUNICATION TECHNIQUES FOR INFORMATION CARRIED IN PLURAL CHANNELS Combining or distributing information via frequency channels Switching a message which includes an address header At least one bus is a ring network Ring or loop forms backbone for interconnecting other networks Bridge between bus systems Having a plurality of nodes performing distributed switching Bridge or gateway between networks TRANSMITTER AND RECEIVER AT SAME STATION (E.G., TRANSCEIVER) | |
