Configuration and control unit for a heterogeneous multi-system
Data communications system to system adapter
Partitioned multiprocessor programming system
Input/output system for multiprocessors
Multiprocessing system having nodes containing a processor and an associated memory module with dynamically allocated local/global storage in the memory modules
Apparatus and method for making of interconnected processors act like a single node in a multinode communication system
Processor having a plurality of CPUS with one CPU being normally connected to common bus
Methods and apparatus for dynamically managing input/output (I/O) connectivity
Switch for serial or parallel communication networks
ApplicationNo. 652177 filed on 05/23/1996
US Classes:709/237, Computer-to-computer handshaking710/72Application-specific peripheral adapting
ExaminersPrimary: Lee, Thomas C.
Assistant: Ton, David
Attorney, Agent or Firm
International ClassG06F 013/00
AbstractA computer system and processing method are provided for coupling multiple physical processing nodes together, wherein each physical processing node is characterized as having its own memory, by either at least one channel which is independent of and coupled to the multiple physical processing nodes or by at least one input/output (I/O) processor, again which is independent of and coupled to the multiple physical processing nodes. The at least one channel and/or the at least one I/O processor couple the multiple physical processing nodes to at least one shared input/output device. Sharing of the at least one channel and/or at least one I/O processor is practical by providing "indirect logical addressing" using logical address tables within the channel subsystem. The logical address tables associate an image identifier (Image-- ID) and processing node identifier (PN-- ID) concatenation with an indexed logical address for use in communicating I/O operation parameters across the at least one channel.