Patent ReferencesModification to a reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable for use in a local area network Flexible switching hub for a communication network Multicast routing in multistage networks Patent #: 5689506 InventorsAssigneeApplicationNo. 919840 filed on 08/28/1997US Classes:370/399, Employing logical addressing for routing (e.g., VP or VC)370/390Replicate messages for multiple destination distributionExaminersPrimary: Pham, ChiAssistant: Tran, Mai-Huong Attorney, Agent or FirmInternational ClassH04L 12//56AbstractAn apparatus and technique for facilitating mapping of a Multicast Circuit Identifier ("MID") to a Local Circuit Identifiers ("CID") is disclosed. Table entries for such mapping can be disposed in non-contiguous memory locations. A pointer is employed in ca h entry to indicate the location of any subsequent memory location associated with the MID. CIDs and associated memory locations are allocated only for ports that participate in a connection. To implement the apparatus and technique a first table provides an index into a second table based upon the MID. The second table includes entries having a port identification field, a pointer field and a CID field. The CID field indicates the CID associated with the port indicated by the port identification field. The CID is written to the header of the copy of the cell to be transmitted to the indicated port. The pointer indicates further entries in the second table that are associated with other copies of the cell to be transmitted in the multicast connection, if such entries exist. The CID is employed to obtain a Virtual Path Identifier ("VPI") and Virtual Circuit Identifier ("VCI") from a third table.Field of SearchSwitching a message which includes an address headerReplicate messages for multiple destination distribution Processing of address header for routing, per se Employing logical addressing for routing (e.g., VP or VC) Employing logical addressing for routing (e.g., VP or VC) Employing logical addressing for routing (e.g., VP or VC) Having both input and output queuing Contention resolution for output Queuing arrangement | |