Semiconductor memory device
Circuit for generating a clock signal to separate bit lines in a semiconductor memory device
Dynamic random access memory with bit line equalizing means
Semiconductor memory device having equalization signal generating circuit
Cartridge fuse mounting structure
Cell plate referencing for DRAM sensing Patent #: 5719813
AbstractAn integrated circuit dynamic memory device is described which stores data in memory cells as a charge on a capacitor. The memory cells have a common cell plate and can be selectively connected to a digit line. Sensing circuitry, including both p-sense and n-sense amplifiers, is connected to the digit line and the cell plate. Equalization circuitry is described to equalize the cell plate and digit line for sensing data stored on a memory cell. Isolation circuitry is described for selectively isolating the sensing circuitry from the memory cells.