Static type semiconductor memory device
Static random access memory
Internal low voltage transformation circuit of static random access memory
Static random access memory of an energy-saving type
Static random access memory resistant to soft error
Static memory device
Static random access memory device with low power dissipation Patent #: 5646902
ApplicationNo. 929890 filed on 09/15/1997
US Classes:365/154, Flip-flop (electrical)365/226, POWERING365/227Conservation of power
ExaminersPrimary: Nguyen, Tan T.
Attorney, Agent or Firm
Foreign Patent References
International ClassG11C 011/40
Foreign Application Priority Data1995-06-02 JP
AbstractA static memory cell, composed of cross-coupled MOS transistors having a relatively high threshold voltage, is equipped with MOS transistors for controlling the power supply line voltage of the memory cell. To permit the voltage difference between two data storage nodes in the inactivated memory cell to exceed the voltage difference between the two nodes when write data is applied from a data line pair DL and /DL to the two nodes in the activated memory cell, the power supply line voltage control transistors are turned on to apply a high voltage VCH to the power supply lines after the word line voltage is turned off. The data holding voltage in the memory cell can be activated to a high voltage independent of the data line voltage, and the data holding voltage can be dynamically set so that read and write operations can be performed at high speed with low power consumption.