Patent ReferencesExtendable circuit architecture Virtual processor module including a reconfigurable programmable matrix Audio/video transceiver provided with a device for reconfiguration of incompatibly received or transmitted video and audio information Method and structure for loading data into several IC devices Method for in-circuit programming of a field-programmable gate array configuration memory Memory mapping method and apparatus to fold sparsely populated structures into densely populated memory columns or rows by selectively transposing X and Y address portions, and programmable gate array applications thereof Patent #: 5692147 InventorApplicationNo. 748041 filed on 11/12/1996US Classes:712/16, Array processor operation712/10, Array processor712/11, Array processor element interconnection712/22Single instruction, multiple data (SIMD)ExaminersPrimary: Coleman, EricAssistant: Monestime, Mackly International ClassG06F 015/00AbstractA multiprocessor having an input/output controller, a process controller, and a multidimensional arrays of field programmable gate arrays (FPGAs), each FPGA having its own local memory. The multiprocessor may be programmed to function as a single-instruction, multiple-data (SIMD) parallel processor having a matrix of processing elements (PEs), where each FPGA may be programmed to operate as a submatrix array of PEs. The multiprocessor is especially useful for image processing, pattern recognition, and neural network applications.Other References
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