U.S. patents available from 1976 to present.
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FPGA-based processor

Patent 5892962 Issued on April 6, 1999. Estimated Expiration Date: Icon_subject November 12, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Extendable circuit architecture
Patent #: 5512765
Issued on: 04/30/1996
Inventor: Gaverick

Virtual processor module including a reconfigurable programmable matrix
Patent #: 5535406
Issued on: 07/09/1996
Inventor: Kolchinsky

Audio/video transceiver provided with a device for reconfiguration of incompatibly received or transmitted video and audio information
Patent #: 5611038
Issued on: 03/11/1997
Inventor: Shaw, et al.

Method and structure for loading data into several IC devices
Patent #: 5640106
Issued on: 06/17/1997
Inventor: Erickson, et al.

Method for in-circuit programming of a field-programmable gate array configuration memory
Patent #: 5640107
Issued on: 06/17/1997
Inventor: Kruse

Memory mapping method and apparatus to fold sparsely populated structures into densely populated memory columns or rows by selectively transposing X and Y address portions, and programmable gate array applications thereof Patent #: 5692147
Issued on: 11/25/1997
Inventor: Larsen, et al.

Inventor

Application

No. 748041 filed on 11/12/1996

US Classes:

712/16, Array processor operation712/10, Array processor712/11, Array processor element interconnection712/22Single instruction, multiple data (SIMD)

Examiners

Primary: Coleman, Eric
Assistant: Monestime, Mackly

International Class

G06F 015/00

Abstract

A multiprocessor having an input/output controller, a process controller, and a multidimensional arrays of field programmable gate arrays (FPGAs), each FPGA having its own local memory. The multiprocessor may be programmed to function as a single-instruction, multiple-data (SIMD) parallel processor having a matrix of processing elements (PEs), where each FPGA may be programmed to operate as a submatrix array of PEs. The multiprocessor is especially useful for image processing, pattern recognition, and neural network applications.

Other References

  • "The REMAP Massively Parallel Computer Platform for Neural Computations", by Lars Bengtsson et al., Proceedings of the Third International Conference on Microelectronics for Neural Networks, 6-8 Apr. 1993 Edinburgh, Scotland UK, pp. 47-62
  • "Automatic Synthesis of Neural Networks to Programmable Hardware", by S. Gick, P. Heusinger and A. Reuter, Proceedings of the Third International Conference on Microelectronics for Neural Networks, 6-8 Apr. 1993 Edinburgh, Scotland UK, pp. 115-120
  • "Fuzzy Associative Memory by means FPGA's", Mario Reyes de los Mozos and Elena Valderrama, Proceedings of the Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, Sep. 26-28, 1994, Turin, Italy, 1994 IEEE, pp. 301-307
  • "RAN2. SOM: A Reconfigurable Neural Network Architecture Based on Bit Stream Arithmetic", by Michael Gschwind, Valentina Salapura, Oliver Maischberger, Proceedings of the Fourth Int'l. Conference on Microelectronics for Neural Networks and Fuzzy Systems, Sep. 26-28, 1994, Turin, Italy, 1994 IEEE, pp. 294-300
  • "Fuzzy Interpretable Dynamically Developing Neural Networks with FPGA Based Implementation", by S.K. Halgamuge, et al., Proceedings of the Fourth Int'l. Conference on Microelectronics for Neural Networks and Fuzzy Systems, Sep. 26-28, 1994, Turin, Italy, 1994 IEEE, pp. 226-234
  • "Cost-performance analysis of FPGA, VLSI and WSI implementations of a RAM-based neural network", by Paul Morgan et al., Proceedings of the Fourth Int'l. Conference on Microelectronics for Neural Networks and Fuzzy Systems, Sep. 26-28, 1994, Turin, Italy, 1994 IEEE, pp. 235-243
  • "Fast Prototyping of Artificial Neural Network: GSN Digital Implementation", by Eduardo fo Valle Simoes, et al., Proceedings of the Fourth Int'l. Conference on Microelectronics for Neural Networks and Fuzzy Systems, Sep. 26-28, 1994, Turin, Italy, 1994 IEEE, pp. 192-20
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