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US Patent 5856697 - Integrated dual layer emitter mask and emitter trench for BiCMOS processes

US Patent Issued on January 5, 1999
Estimated Patent Expiration Date: Icon_subject July 14, 2017Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
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Abstract

A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The polysilicon emitter isolation provides for better electrical breakdown characteristics between the emitter and the base by protecting the dielectric layer between the polysilicon emitter and base regions from defects and contamination associated with the BiCMOS manufacturing environment. The polysilicon emitter is trenched into the semiconductor substrate in order to reduce transistor operation problems associated with hot electron injection. Consistent base widths improve transistor performance uniformity thereby improving manufacturability and reliability.

Other References

  • Wolf, S. and Tauber, R. "Silicon Processing for the VLSI Era," Lattice Press, vol 1, pp., 531, 532 (1986

Inventors

Application

No. 895270 filed on 07/14/1997

US Classes:

257/378, Combined with bipolar transistor257/370, Combined with bipolar transistor257/E21.696Bipolar and MOS technologies (EPO)

Field of Search

257/378Combined with bipolar transistor

Examiners

Primary: Meier, Stephen D.

Attorney, Agent or Firm

US Patent References

4435898, Method for making a base etched transistor integrated circuit
Issued on: 03/13/1984
Inventor: Gaur ,   et al.
5132234, Method of producing a bipolar CMOS device
Issued on: 07/21/1992
Inventor: Kim, et al.
5175606, Reverse self-aligned BiMOS transistor integrated circuit
Issued on: 12/29/1992
Inventor: Tsai, et al.
5192992, BICMOS device and manufacturing method thereof
Issued on: 03/09/1993
Inventor: Kim, et al.
5196356, Method for manufacturing BICMOS devices
Issued on: 03/23/1993
Inventor: Won, et al.
5198372, Method for making a shallow junction bipolar transistor and transistor formed thereby
Issued on: 03/30/1993
Inventor: Verret
5204277, Method of forming bipolar transistor having substrate to polysilicon extrinsic base contact
Issued on: 04/20/1993
Inventor: Somero, et al.
5213989, Method for forming a grown bipolar electrode contact using a sidewall seed
Issued on: 05/25/1993
Inventor: Fitch, et al.
5319235Monolithic IC formed of a CCD, CMOS and a bipolar element
Issued on: 06/07/1994
Inventor: Kihara, et al.

Foreign Patent References

  • 0033495 EP. 01/09/1981

International Classes

H01L 029/76
H01L 029/94
H01L 031/062
H01L 031/113

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