Patent 5847441 Issued on December 8, 1998. Estimated Expiration Date: May 10, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
257/530, Anti-fuse257/390, Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM))257/E27.081, Including field-effect component (EPO)327/502, Breakdown characteristic (e.g., zener diode, etc.)365/96Fusible
An integrated semiconductor junction antifuse is formed from either adjacent regions of opposite doping types or spaced apart regions of similar doping type within a substrate. In its unblown state, the junction antifuse forms an open circuit that blocks current from flowing while in the blown state, the junction antifuse conducts current. The junction antifuse is blown by applying a breakdown voltage sufficient to overcome a semiconductor junction so that current flows across the reverse-biased semiconductor junction. As current flows across the reverse-biased junction, dopant migration forms a conductive path so that the junction antifuse no longer forms an open circuit.