Device and method for extracting a bit field from a stream of data
Patent 5835793 Issued on November 10, 1998. Estimated Expiration Date: 
May 2, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 2, 2017. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesVariable length code parallel decoding apparatus and method Hardware bit block transfer operator in a graphics rendering processor Variable-length code decoding device Graphics command processing method in a computer graphics system System and method of extracting binary image data Patent #: 5623556 InventorsAssigneeApplicationNo. 851168 filed on 05/02/1997US Classes:712/300BYTE-WORD REARRANGING, BIT-FIELD INSERTION OR EXTRACTION, STRING LENGTH DETECTING, OR SEQUENCE DETECTINGExaminersPrimary: Lall, Parshotam S.Assistant: Vu, Viet D. Attorney, Agent or FirmInternational ClassesG06F 009/30G06F 012/06 AbstractA data processing device uses a portion of a random access memory as an input buffer 114 for holding a portion of a stream of data which is being processed by a processing unit within the processing device. A Get Bit-Field instruction is provided which directs the processing unit to extract selected bit fields from the data stream stored in the input buffer. A register R6 holds a bit address which points to the end of a selected bit field, while a register R0 holds the width of the selected bit field. An address register is connected to a register R6 in a manner that allows data words to be accessed in input buffer 114 using only a word portion of the bit address. A funnel shifter 203 is disposed to extract the selected bit field from concatenated data words in response to a bit address portion of the bit address in register R6.Other References
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