Bus driver failure detection system
Patent 5834949 Issued on November 10, 1998. Estimated Expiration Date: 
November 27, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
November 27, 2016. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesActive termination circuit for computer interface use Dynamic logic circuit including bipolar transistors and field-effect transistors Method and apparatus for driving an integrated-circuit output pad Semiconductor integrated tri-state circuitry with test means Parallel buffer/driver configuration between data sending terminal and data receiving terminal Patent #: 5498976 InventorAssigneeApplicationNo. 757998 filed on 11/27/1996US Classes:326/86, Bus driving326/16, WITH TEST FACILITATING FEATURE326/83Field-effect transistorExaminersPrimary: Santamauro, JonAssistant: Le, Don Phu Attorney, Agent or FirmForeign Patent References
International ClassH03K 019/018.5Foreign Application Priority Data1995-12-08 JPAbstractThe invention provides a bus driver failure detection system which facilitates detection of a failure of a bus driver from which data are sent out to a bus. The bus driver failure detection system includes a plurality of bus drivers for sending out signals to a single bus, at least one receiver connected to the bus, and an impedance control circuit for controlling the bus so that, upon testing, the bus does not exhibit a high impedance state. The impedance control circuit may be constructed as a circuit which holds a value of the bus in response to a test signal. | |
