U.S. patents available from 1976 to present.
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Polysilicon pillar heat sinks for semiconductor on insulator circuits

Patent 5793107 Issued on August 11, 1998. Estimated Expiration Date: Icon_subject August 11, 2015. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Self-aligning integrated circuit assembly
Patent #: 4949148
Issued on: 08/14/1990
Inventor: Bartelink

Polysilicon FETs
Patent #: 5111260
Issued on: 05/05/1992
Inventor: Malhi, et al.

Semiconductor device
Patent #: 5241211
Issued on: 08/31/1993
Inventor: Tashiro

Sidewall doping technique for SOI transistors
Patent #: 5292670
Issued on: 03/08/1994
Inventor: Sundaresan

SOI type vertical channel field effect transistor and process of manufacturing the same Patent #: 5312782
Issued on: 05/17/1994
Inventor: Miyazawa

Inventor

Assignee

Application

No. 145268 filed on 10/29/1993

US Classes:

257/717, Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer)257/347, Single crystal semiconductor layer on insulating substrate (SOI)257/713, For integrated circuit257/E23.105Wire-like or pin-like cooling fins or heat sinks (EPO)

Examiners

Primary: Ostrowski, David

Attorney, Agent or Firm

International Class

H01L 023/34

Abstract

A heat sink is formed on a bonded semiconductor on insulator (SOI) wafer. A trench is formed which extends from a top of the bonded SOI wafer through an isolation region of the bonded SOI wafer to a base of the bonded SOI wafer. The base of the bonded SOI wafer is located below the isolation region of the bonded SOI wafer. A conductive pillar is formed in the trench. The conductive pillar extends from the top of the bonded SOI wafer through the isolation region of the bonded SOI wafer and is physically in contact with but electrically insulated from the base of the bonded SOI wafer. In the preferred embodiment, the conductive pillar is formed of doped polysilicon. The doped polysilicon is of a conductivity type which is different than the conductivity type of the base. Out-diffusion from the doped polysilicon forms a region within the base which electrically insulates the conductive pillar from the base.

Other References

  • AcuThin Wafer Specifications, Hughes Danbury Optical Systems, Inc. Precision Materials Operations, 100 Wooster Heights Road, Danbury, Connecticut 06810-7589
  • Laura Peters, SOI Takes Over Where Silicon Leaves Off,Semiconductor International, Mar. 1993, pp. 48-51.
  • H.H. Hosack, Recent Progress in SOI Materials For the Next Generation of IC Technology,The Electrochemical Society Interface, Spring 1993, pp. 51-5
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