Semiconductor device wherein n-channel MOSFET, p-channel MOSFET and nonvolatile memory cell are formed in one chip and method of making it
Method of fabricating non-volatile semiconductor memory device
Method of making memory cells with peripheral transistors
Method of fabrication of integrated circuit chip containing EEPROM and capacitor Patent #: 5550072
ApplicationNo. 613941 filed on 03/13/1996
US Classes:438/258, Including additional field effect transistor (e.g., sense or access transistor, etc.)257/E21.685, Control gate layer used for peripheral FET (EPO)257/E21.688, Floating gate dielectric layer used for peripheral FET (EPO)257/E27.081Including field-effect component (EPO)
ExaminersPrimary: Niebling, John F.
Assistant: Booth, Richard A.
Attorney, Agent or Firm
International ClassH01L 021/824.7
Foreign Application Priority Data1995-03-22 KR
AbstractA manufacturing method of a nonvolatile memory includes the steps of forming a field oxide film on a Cell Region (CR) and a Peripheral circuit Area (PA) of a semiconductor substrate, and then defining an active region, sequentially forming a tunneling oxide film, a lower gate, and a gate insulating film, eliminating the gate insulating film, the lower gate, and tunneling oxide film on the PA, and then forming a gate oxide film on the substrate, forming an upper gate and an upper insulating film on the whole surface of the semiconductor substrate, etching the upper insulating film and the upper gate simultaneously (in the first embodiment) or separately (in the second embodiment), and then forming a single layer gate pattern and a stack gate pattern on the PA and on the CR, respectively, etching the gate insulating film and the lower gate on the CR by using a stack gate pattern, forming an interlayer dielectric film on the semiconductor substrate, and then forming a metallic wiring. Thus, a function of detecting an end point can be prevented from lowering, a process can also be simplified, and further a loss of the field oxide film can be minimized, so that it is possible to prevent the device isolation characteristics from being reduced and damage of the substrate can be prevented.