Patent ReferencesParallelization compile method and system Multiprocessor system having synchronization control mechanism Method of synchronizing parallel processors employing channels and compiling method minimizing cross-processor data dependencies Barrier synchronization for distributed memory massively parallel processing systems Patent #: 5434995 InventorsAssigneeApplicationNo. 871562 filed on 06/10/1997US Classes:709/248, MULTICOMPUTER SYNCHRONIZING713/601Inhibiting timing generator or componentExaminersPrimary: Kim, Kenneth S.Attorney, Agent or FirmInternational ClassG06F 015/16AbstractA barrier is used to synchronize parallel processors. The barrier is "fuzzy", i.e. it includes several instructions in each instruction stream. None of the processors performing related tasks can execute an instruction after its respective fuzzy barrier until the others have finished the instruction immediately preceding their respective fuzzy barriers. Processors therefore spend less time waiting for each other. A state machine is used to keep track of synchronization states during the synchronization process. | |